Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits

This paper presents a direct performance-driven placement algorithm for analog integrated circuits. The performance specications directly drive the layout tools without intermediate parasitic constraints. A simulatedannealing algorithm is used to drive an initial solution to a placement that respects the circuit's performance specications. During each iteration, the layout-induced performance degradation is calculated from the geometrical properties of the intermediate solution. The placement tool handles symmetry constraints, circuit loading eects and device mismatches. The feasibility of the approach is demonstrated with practical circuit examples.

• Type: Conference
• Year: 1995
• Where: DAC
• Authors: Koen Lampaert, Georges G. E. Gielen, Willy M. C. Sansen
• Keywords: Computer Architecture, DAC 1995, Intermediate Parasitic Constraints, Performance Specications, Performance-driven Placement Algorithm