Architectural Exploration and Optimization of Local Memory in Embedded Systems

Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for exploring the on-chip memory architecture for a given application, based on a memory performance estimation scheme. The analytical technique has the important advantage of enabling a fast evaluation of candidate memory architectures in the early stages of system design. Our experiments demonstrate thatour estimationsclosely follow the actual simulated performance, at significantly reduced run times.

• Type: Conference
• Year: 1997
• Where: ISSS
• Authors: Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
• Keywords: Candidate Memory Architectures, Hardware, ISSS 1997, Memory Performance Estimation, On-chip Memory Architecture