Reed-Solomon codes are an important class of error correcting codes used in many applications related to communications and digital storage. The fundamental operations in Reed-Solomon encoding and decoding involve Galois field arithmetic, which is not directly supported in general purpose processors. On the other hand, pure hardware implementations of Reed-Solomon coders are not programmable. In this paper, we present a novel Reed-Solomon encoding algorithm, which avoids polynomial division and is suitable for Single Instruction Multiple Data (SIMD) processors. We also propose four new instructions for Galois field arithmetic. We show that by using the new instructions, we can speedup Reed-Solomon decoding by more than a factor of 12, while still maintaining programmability.