Low-Cost Adaptive Data Prefetching

We explore different prefetch distance-degree combinations and very simple, low-cost adaptive policies on a superscalar core with a high bandwidth, high capacity on-chip memory hierarchy. We show that sequential prefetching aggressiveness can be properly tuned at a very low cost to outperform state-of-the-art hardware data prefetchers and complex filtering mechanisms, avoiding performance losses in hostile applications and keeping the pressure of the prefetching on the cache low, turning it out into a real implementation option for current processors.

• Type: Conference
• Year: 2008
• Where: EUROPAR
• Authors: Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals
• Keywords: Capacity On-chip Memory, Distributed And Parallel Computing, EUROPAR 2008, Low-cost Adaptive Policies, Sequential Prefetching Aggressiveness