In a coarse-grained reconfigurable architecture, the functions of resources such as Arithmetic Logic Units (ALUs) can be reconfigured. Unlike the programmability of a general purpose processor, the programmability of a coarse-grained reconfigurable architecture is limited. The limitation might be the number of different patterns or the number of different configurations of each ALU. This paper presents a column arrangement algorithm to sort the elements of patterns to reduce the number of configurations of each reconfigurable ALU. The experimental results show that this algorithm leads to nearly optimal results.
Yuanqing Guo, Cornelis Hoede, Gerard J. M. Smit