Evolvable Hardware for Generalized Neural Networks

This paper describes an evolvable hardware (EHW) system for generalized neural network learning. We have developed an ASIC VLSI chip, which is a building block to configure a scalable neural network hardware system. In our system, both the topology and the hidden layer node functions of a neural network mapped on the chips are dynamically changed using a genetic algorithm. Thus, the most desirable network topology and choice of node function (e.g. Gaussian or sigmoid) for a given application can be determined adaptively. This approach is particularly suited to applications requiring ability to cope with time-varying problems and real-time timing constraints. The chip consists of 15 Digital Signal Processors (DSPs), whose functions and interconnections are reconfigured dynamically according to the chromosomes of the genetic algorithm. Incorporation of local learning hardware increases the learning speed significantly. Simulation results on adaptive equalization in digital mobile commun...

• Type: Conference
• Year: 1997
• Where: IJCAI
• Authors: Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani, Tetsuya Higuchi
• Keywords: IJCAI 1997, IJCAI 2007, Neural Network, Neural Network Hardware, Node Function