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WSC
1997

Modeling a 10 Gbit/s/Port Shared Memory ATM Switch

14 years 16 days ago
Modeling a 10 Gbit/s/Port Shared Memory ATM Switch
The speed of optical transmission links is growing at a rate which is difficult for the micro-electronic technology of ATM switches to follow. In order to cover the transmission rate gap between optical transmission links and ATM switches, ATM switches operating at multi Gbit/s rate have to be developed. A 10 Gbit/s/port shared memory ATM switch is under development at Linköping Institute of Technology (LiTH) and Lund Institute of Technology (LTH) in Sweden. It has 8 inputs and 8 outputs. The switch will be implemented on a single chip in 0.8 µm BiCMOS. In this paper, we report on a performance analysis of the switch under a specific traffic model. This traffic model emulates the LAN type of traffic. Performance analysis is crucial for evaluating and dimensioning the very high speed ATM switch.
Tawfik Lazraq, Jakob Brundin, Per Andersson, &Arin
Added 01 Nov 2010
Updated 01 Nov 2010
Type Conference
Year 1997
Where WSC
Authors Tawfik Lazraq, Jakob Brundin, Per Andersson, Åke Arvidsson
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