An errorless circuit for a boolean function is one that outputs the correct answer or "don't know" on each input (and never outputs the wrong answer). The goal of errorless hardness amplification is to show that if f has no size s errorless circuit that outputs "don't know" on at most a fraction of inputs, then some f related to f has no size s errorless circuit that outputs "don't know" on at most a 1 - fraction of inputs. Thus the hardness is "amplified" from to 1 -. Unfortunately, this amplification comes at the cost of a loss in circuit size. This is because such results are proven by reductions which show that any size s errorless circuit for f that outputs "don't know" on at most a 1 - fraction of inputs could be used to construct a size s errorless circuit for f that outputs "don't know" on at most a fraction of inputs. If the reduction makes q queries to the hypothesized errorless circuit...