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    IEICET
    2007
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    A 1.25-Gb/s Burst-Mode Half-Rate Clock and Data Recovery Circuit Using Realigned Oscillation

    13 years 11 months ago
    A 1.25-Gb/s Burst-Mode Half-Rate Clock and Data Recovery Circuit Using Realigned Oscillation
    Download  www.ee.nchu.edu.tw
    Ching-Yuan Yang, Jung-Mao Lin
    claim paper
    Added 14 Dec 2010
    Updated 14 Dec 2010
    Type Journal
    Year 2007
    Where IEICET
    Authors Ching-Yuan Yang, Jung-Mao Lin
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