In the emerging high-speed packet-switched networks, fair packet scheduling algorithms in switches and routers will form an important component of the mechanisms that seek to satisfy the Quality of Service (QoS) requirements of various applications. The latency bound of a scheduling discipline is an important QoS parameter, especially for real-time playback applications. Frame-based schedulers such as Deficit Round Robin (DRR), though extremely efficient with an O(1) dequeuing complexity, lead to high latencies due to bursty transmissions of each flow's traffic. In recent work by Tsao and Lin [Computer Networks 35 (2001) 287], the authors propose a novel scheme, called Pre-order DRR, which overcomes this limitation of DRR while still preserving a low work complexity. In Pre-order DRR, a priority queue module, appended to the original DRR scheduler, re-orders the packet transmission sequence and thus distributes the output more evenly among flows, reducing burstiness and improving...
Salil S. Kanhere, Harish Sethu