To Booth or not to Booth

Booth Recoding is a commonly used technique to recode one of the operands in binary multiplication. In this way the implementation of a multipliers' adder tree can be improved in both cost and delay. The improvement due to Booth Recoding is said to be due to improvements in the layout of the adder tree especially regarding the lengths of wire connections and thus cannot be analyzed with a simple gate model. Although conventional VLSI models consider wires in layouts, they usually neglect wires when modeling the delay. To make the layout improvements due to Booth recoding tractable in a technology-independent way, we introduce a VLSI model that also considers wire delays and constant factors. Based on this model we consider the layouts of binary multipliers in a parametric analysis providing answers to the question whether to use Booth Recoding or not. We formalize and prove the folklore theorems that Booth recoding improves the cost and cycle time of `standard' multipliers b...

• Type: Journal
• Year: 2002
• Where: INTEGRATION
• Authors: Wolfgang J. Paul, Peter-Michael Seidel
• Keywords: Adder Tree, Booth Recoding, INTEGRATION 2002, Recoding