O-Router:an optical routing framework for low power on-chip silicon nano-photonic integration

In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices. We formulate the optical layer routing problem as the minimization of total on-chip optical modulator cost (laser power consumption) with Integer Linear Programming technique under various detection constraints. Key techniques for variable number reduction and routing speedup are also explored and utilized. O-Router is tested on optical netlist benchmarks modified from top global nets of ISPD98/08 routing benchmarks. O-Router experimental results are compared with conventional minimum spanning tree algorithm, demonstrating an average of over 50% improvement in terms of total on-chip optical layer power reduction. Categories and Subject Descriptors B.7.2 [Hardware, Integrated Circuit]: Design Aids General Terms Algorithms, Design, Performance Keywords Optical Routing, Low Power Nanophotonic Integration, Inte...

• Type: Conference
• Year: 2009
• Where: DAC
• Authors: Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, David Z. Pan
• Keywords: DAC 2009, Design Automation, On-chip Optical Interconnect, On-chip Optical Layer, On-chip Optical Modulator