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2002

Efficient inductance extraction using circuit-aware techniques

13 years 11 months ago
Efficient inductance extraction using circuit-aware techniques
We propose two practical approaches for on-chip inductance extraction to obtain a highly sparsified and accurate inverse inductance matrix K. Both approaches differ from previous methods in that they use circuit characteristics to obtain a sparse, stable and symmetric K, using the concept of resistance-dominant and inductance-dominant lines. Specifically, they begin by finding inductance-dominant lines and forming initial clusters, followed by heuristically enlarging and/or combining these clusters, with the goal of including only the important inductance terms in the sparsified K matrix. Algorithm 1 permits the influence of the magnetic field of aggressor lines to reach the edge of the chip, while Algorithm 2 works under the simplified assumptions that the supply lines have zero j jij dtdIL )/( drops (but have nonzero parasitic R's and C's), and that currents cannot return through supply lines beyond a user-defined distance. For reasonable designs, Algorithm 1 delivers a sp...
Haitian Hu, Sachin S. Sapatnekar
Added 23 Dec 2010
Updated 23 Dec 2010
Type Journal
Year 2002
Where TVLSI
Authors Haitian Hu, Sachin S. Sapatnekar
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