Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing

s, and abstractions, typically enabling faster development times than with traditional Hardware ion Languages (HDLs). However, programming at a higher level of abstraction is typically accompanied by some loss of performance as well as reduced transparency of application behavior, making it difficult to understand and improve application performance. While runtime tools for performance analysis are often featured in development with traditional HLLs for sequential and parallel programming, HLL-based development for FPGAs have an equal or greater need yet lack these tools. This paper presents a novel and portable framework for runtime performance analysis of HLL applications for FPGAs, including an automated tool for performance analysis of designs created with Impulse C, a commercial HLL for FPGAs. As a case study, this tool is used to successfully locate performance bottlenecks in a molecular dynamics kernel in order to gain speedup. Categories and Subject Descriptors: B.8.2 [PERFORMA...

• Type: Journal
• Year: 2010
• Where: TRETS
• Authors: John Curreri, Seth Koehler, Alan D. George, Brian Holland, Rafael Garcia
• Keywords: Performance, Performance Analysis, Tools, TRETS 2010