The case for hardware transactional memory in software packet processing

Software packet processing is becoming more important to enable differentiated and rapidly-evolving network services. With increasing numbers of programmable processor and accelerator cores per network node, it is a challenge to support sharing and synchronization across them in a way that is scalable and easy-to-program. In this paper, we focus on parallel/threaded applications that have irregular control-flow and frequently-updated shared state that must be synchronized across threads. However, conventional lock-based synchronization is both difficult to use and also often results in frequent conservative serialization of critical sections. Alternatively, we propose that Transactional memory (TM) is a good match to software packet processing: it both (i) can allow the system to optimistically exploit parallelism between the processing of packets whenever it is safe to do so, and (ii) is easy-to-use for a programmer. With the NetFPGA [1] platform and four network packet processing ap...

• Type: Journal
• Year: 2010
• Where: ANCS
• Authors: Martin Labrecque, J. Gregory Steffan
• Keywords: ANCS 2010, Computer Networks, Conservative Serialization, Conventional Lock-based Synchronization, Packet Processing Applications