Architecture-adaptive range limit windowing for simulated annealing FPGA placement

Previous research has shown both theoretically and practically that simulated annealing can greatly benefit from the incorporation of an adaptive range limiting window to control the acceptance ratio of swaps during placement. However, the implementation of such a system is not necessarily obvious. Existing range limiting techniques have several fundamental shortcomings when dealing with both standard island-style FPGAs and more exotic architectures. In this paper we discuss the nature of these problems and present a new algorithm that attempts to deal with these issues. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design Aids ? Placement and routing. General Terms Algorithms, Design. Keywords Reconfigurable logic, placement, simulated annealing, windowing, range limiting, architecture-adaptive.

• Type: Conference
• Year: 2005
• Where: DAC
• Authors: Kenneth Eguro, Scott Hauck, Akshay Sharma
• Keywords: DAC 2005, Design Automation, Range Limiting Techniques, Range Limiting Window, Simulated Annealing