Flexible ASIC: shared masking for multiple media processors

ASIC provides more than an order of magnitude advantage in terms of density, speed, and power requirement per gate. However, economic (cost of masks) and technological (deep micron manufacturability) trends favor FPGA as an implementation platform. In order to combine the advantages of both platforms and alleviate their disadvantages, recently a number of approaches, such as structured ASIC/regular fabrics, have been proposed. Our goal is to introduce an approach that has the same objective, but is orthogonal to those already proposed. The idea is to implement several ASIC designs in such a way that they share the datapath, memory structure, and several bottom layers of interconnect, while each design has only a few unique metal layers. We identified and addressed two main problems in our quest to develop a CAD flow for realization of such designs. They are: (i) the creation of the datapath, and (ii) the identification of common and unique interconnects for each design. Both problems ...

• Type: Conference
• Year: 2005
• Where: DAC
• Authors: Jennifer L. Wong, Farinaz Koushanfar, Miodrag Potkonjak
• Keywords: DAC 2005, Deep Micron Manufacturability, Design Automation, Design Flow Platform, Unique Metal Layers