Sciweavers

PATMOS
2010
Springer

L1 Data Cache Power Reduction Using a Forwarding Predictor

13 years 9 months ago
L1 Data Cache Power Reduction Using a Forwarding Predictor
In most modern processor designs the L1 data cache has become a major consumer of power due to its increasing size and high frequency access rate. In order to reduce this power consumption, we propose in this paper a straightforward filtering technique. The mechanism is based on a highly accurate forwarding predictor that determines if a load instruction will take its corresponding data via forwarding from the load-store structure
P. Carazo, R. Apolloni, Fernando Castro, Daniel Ch
Added 14 Feb 2011
Updated 14 Feb 2011
Type Journal
Year 2010
Where PATMOS
Authors P. Carazo, R. Apolloni, Fernando Castro, Daniel Chaver, Luis Piñuel, Francisco Tirado
Comments (0)