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24

VLSI
2010
Springer

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Order is power: Selective Packet Interleaving for energy efficient Networks-on-Chip

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Order is power: Selective Packet Interleaving for energy efficient Networks-on-Chip

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Amit Berman, Ran Ginosar, Idit Keidar

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Software Engineering | VLSI 2010 |

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Added	23 May 2011
Updated	23 May 2011
Type	Journal
Year	2010
Where	VLSI
Authors	Amit Berman, Ran Ginosar, Idit Keidar

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