10x10: A General-purpose Architectural Approach to Heterogeneity and Energy Efficiency

Two decades of microprocessor architecture driven by quantitative 90/10 optimization has delivered an extraordinary 1000-fold improvement in microprocessor performance, enabled by transistor scaling which improved density, speed, and energy. Recent generations of technology have produced limited benefits in transistor speed and power, so as a result the industry has turned to multicore parallelism for performance scaling . Long-range studies [1, 2] indicate that radical approaches are needed in the coming decade – extreme parallelism, near-threshold voltage scaling (and resulting poor single-thread performance), and tolerance of extreme variability – are required to maximize energy efficiency and compute density. These changes create major new challenges in architecture and software. As a result, the performance and energy-efficiency advantages of heterogeneous architectures are increasingly attractive. However, computing has lacked an optimization paradigm in which to systematica...

• Type: Journal
• Year: 2011
• Where: PROCEDIA
• Authors: Andrew A. Chien, Allan Snavely, Mark Gahagan
• Keywords: Heterogeneous Architectures, Microprocessor Architecture, Microprocessor Performance, Pattern Recognition, PROCEDIA 2011