Sciweavers

PKC
2016
Springer

ARMed SPHINCS - Computing a 41 KB Signature in 16 KB of RAM

8 years 7 months ago
ARMed SPHINCS - Computing a 41 KB Signature in 16 KB of RAM
Abstract. This paper shows that it is feasible to implement the stateless hash-based signature scheme SPHINCS-256 on an embedded microprocessor with memory even smaller than a signature and limited computing power. We demonstrate that it is possible to generate and verify the 41 KB signature on an ARM Cortex M3 that only has 16 KB of memory available. We provide benchmarks for our implementation which show that this can be used in practice. To analyze the costs of using the stateless SPHINCS scheme instead of its stateful alternatives, we also implement XMSSMT on this platform and give a comparison.
Andreas Hülsing, Joost Rijneveld, Peter Schwa
Added 08 Apr 2016
Updated 08 Apr 2016
Type Journal
Year 2016
Where PKC
Authors Andreas Hülsing, Joost Rijneveld, Peter Schwabe
Comments (0)