CommGuard: Mitigating Communication Errors in Error-Prone Parallel Execution

As semiconductor technology scales towards ever-smaller transistor sizes, hardware fault rates are increasing. Since important application classes (e.g., multimedia, streaming workloads) are data-error-tolerant, recent research has proposed techniques that seek to save energy or improve yield by exploiting error tolerance at the architecture/microarchitecture level. Even seemingly error-tolerant applications, however, will crash or hang due to control-flow/memory addressing errors. In parallel computation, errors involving inter-thread communication can have equally catastrophic effects. Our work explores techniques that mitigate the impact of potentially catastrophic errors in parallel computation, while still garnering power, cost, or yield benefits from data error tolerance. Our proposed CommGuard solution uses FSMbased checkers to pad and discard data in order to maintain semantic alignment between program control flow and the data communicated between processors. CommGuard tec...

• Type: Journal
• Year: 2015
• Where: ASPLOS
• Authors: Yavuz Yetim, Sharad Malik, Margaret Martonosi
• Keywords: ASPLOS 2015, Programming Languages