Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models parameterized in a high-dimensional process variation space are desired. However, the high parameter dimensionality, imposed by a large number of variation sources encountered in modern technologies, can introduce significant complexion in circuit analysis and may even render performance variability analysis completely intractable. We address the challenge brought by high-dimensional process variations via a new performance-oriented parameter dimension reduction technique. The basic premise behind our approach is that the dimensionality of performance variability is determined not only by the statistical characteristics of the underlying process variables, but also by the structural information imposed by a given design. Using the powerful reduced rank regression (RRR) and its extension as a vehicle for variabilit...