Sciweavers

ICCAD
2006
IEEE

Conjoining soft-core FPGA processors

14 years 8 months ago
Conjoining soft-core FPGA processors
Soft-core programmable processors on field-programmable gate arrays (FPGAs) can be custom synthesized to instantiate only those hardware units, such as multipliers and floating-point units, that an application requires to meet performance demands, thus minimizing soft-core size on the FPGA. Conjoining processors, meaning to share hardware units among two or more processors, can further reduce soft-core size, leaving more resources for other circuits such as custom coprocessors. Using Xilinx MicroBlaze coprocessors and standard embedded system benchmarks, we show that conjoining two processors can provide 16% processor size reductions on average, with less than 1% cycle count overhead. We introduce an efficient dynamic-programming-based exploration method to find the best custom instantiation of hardware units, considering both standalone and conjoined options, for soft-core processors. Categories and Subject Descriptors C.3 [Special-Purpose and Application-Based Systems]: – Micropro...
David Sheldon, Rakesh Kumar, Frank Vahid, Dean M.
Added 16 Mar 2010
Updated 16 Mar 2010
Type Conference
Year 2006
Where ICCAD
Authors David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. Tullsen, Roman L. Lysecky
Comments (0)