Abstract— We present an improved thresholding LDPC decoding algorithm which outperforms the Split-Row and original Split-Row Threshold decoders with a small increase in hardware. Simulation results show that the algorithm provides 0.27– 0.50 dB coding gain over Split-Row, 0.10–0.20 dB over Split-Row Threshold, and is within 0.08–0.13 dB of SPA. Compared with the original Threshold algorithm the check node processor’s gate count is increased by 3% while total chip area is kept the same.
Tinoosh Mohsenin, Dean Truong, Bevan M. Baas