A 10 Gbps OTN Framer Implementation Targeting FPGA Devices

Abstract—Integrated circuits for very high-speed telecommunication protocols often use ASICs, due to their strict timing constraints. This scenario is changing, since modern FPGAs, implemented in 65 or 45 nm technologies achieve high operating frequencies, and serializer/deserializer hardwired modules enable the reception of high speed aggregated rates (e. g. 10 Gbps or more), spanning the input stream for internal parallel computation. This paper presents a complete solution for an Optical Transport Network framer using FPGA devices. The framer receives a 10 Gbps stream originated from optical fiber medium, extracts its payload information, and transmits payload data at 10 Gbps. A working prototype was implemented in Virtex-4 and Virtex-5 (Abstract) Keywords-FPGA, OTN (Optical Transport Network), Telecommunication Circuits, Framer (key words)

• Type: Conference
• Year: 2009
• Where: RECONFIG
• Authors: Guilherme Guindani, Frederico Ferlini, Jeferson Oliveira, Ney Laert Vilar Calazans, Daniel V. Pigatto, Fernando Gehm Moraes
• Keywords: Framer, Optical Transport Network, RECONFIG 2009, Reconfigurable Computing, Transport Network Framer