End-to-end register data-flow continuous self-test

While Moore’s Law predicts the ability of semi-conductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in that law. One concern is the verification effort of modern computing systems, which has grown to dominate the cost of system design. On the other hand, technology scaling leads to burn-in phase out. As a result, in-the-field error rate may increase due to both actual errors and latent defects. Whereas data can be protected with arithmetic codes (like parity or ECC), there is a lack of cost-effective mechanisms for control logic. This paper presents a light-weight microarchitectural mechanism that ensures that data consumed through registers are correct. Microarchitecture presents a new way to manage reliability and testing without significantly sacrificing cost and performance, offering a unique opportunity to detect errors in the field at low cost. Our results show a coverage around 90% for the target...

• Type: Conference
• Year: 2009
• Where: ISCA
• Authors: Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González
• Keywords: Control Logic, Hardware, ISCA 2009, Issue Queue Logic, Technology Scaling Leads