An FPGA-Based Real-Time Event Sampler

This paper presents the design and FPGA-implementation of a sampler that is suited for sampling real-time events in embedded systems. Such sampling is useful, for example, to test whether real-time events are handled in time on such systems. By designing and implementing the sampler as a logic analyzer on an FPGA, several design parameters can be explored and easily modified to match the behavior of different kinds of embedded systems. Moreover, the trade-off between price and performance becomes easy, as it mainly exists of choosing the appropriate type and speed grade of an FPGA family.

• Type: Conference
• Year: 2010
• Where: ARC
• Authors: Niels Penneman, Luc Perneel, Martin Timmerman, Bjorn De Sutter
• Keywords: ARC 2010, Embedded Systems, Hardware, Real-time Events, Such Sampling