Integer and floating-point constant multipliers for FPGAs

Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimised floating-point hardware operators not available in microprocessors. Multiplication by a constant is an important example of such an operator. This article presents an architecture generator for the correctly rounded multiplication of a floating-point number by a constant. This constant can be a floating-point value, but also an arbitrary irrational number. The multiplication of the significands is an instance of the well-studied problem of constant integer multiplication, for which improvement to existing algorithms are also proposed and evaluated.

• Type: Conference
• Year: 2008
• Where: ASAP
• Authors: Nicolas Brisebarre, Florent de Dinechin, Jean-Michel Muller
• Keywords: ASAP 2008, Constant Integer Multiplication, Correctly Rounded Multiplication, Distributed And Parallel Computing, Optimised floating-point Hardware