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CGO
2008
IEEE

Branch-on-random

14 years 7 months ago
Branch-on-random
We propose a new instruction, branch-on-random, that is like a standard conditional branch, except rather than specifying the condition on which the branch should be taken, it specifies a frequency at which the branch should be taken. We show that branchon-random is useful for reducing the overhead of program instrumentation, via sampling. Specifically, branch-on-random provides an order-of-magnitude reduction in execution time overhead compared to previously proposed software-only frameworks for instrumentation sampling. Furthermore, we demonstrate that branch-on-random can be cleanly architected and implemented simply and efficiently. For simple processors, we estimate that branch-on-random can be implemented with 20 bits of state and less than 100 gates; for aggressive superscalars, this grows to less than 100 bits of state and at most a few hundred gates. Categories and Subject Descriptors: C.0 [Computer Systems Organization]: General – Hardware/Software Interfaces General Te...
Edward Lee, Craig B. Zilles
Added 29 May 2010
Updated 29 May 2010
Type Conference
Year 2008
Where CGO
Authors Edward Lee, Craig B. Zilles
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