Modulo scheduling for highly customized datapaths to increase hardware reusability

In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met with software implementations on a general purpose processor or DSP. The downsides of using ASICs include high non-recurring engineering costs, inability to accommodate changes in the application after production, and inability to reuse hardware for new applications. However, by allowing a degree of post-programmability, the hardware can retain high performance and energy efficiency while increasing flexibility and reusability. The difficulty with programmable custom hardware lies in mapping new applications onto an existing datapath that is both sparse and irregular. This paper proposes a constraint-driven modulo scheduler that maps softwarepipelineable loops onto programmable loop accelerator hardware. The scheduler is able to target accelerators with widely varying levels of datapath functional capabili...

• Type: Conference
• Year: 2008
• Where: CGO
• Authors: Kevin Fan, Hyunchul Park, Manjunath Kudlur, Scott A. Mahlke
• Keywords: CGO 2008, Custom Hardware, Hardware, Loop Accelerator Hardware, Software Engineering