—A new delta-sigma Analog-to-Digital Converter (ADC) is presented in this paper. A two-step pipeline ADC is used as the quantizer of this delta-sigma modulator to reduce the quantization noise at the output of the modulator. The proposed structure relaxes the output swing and gain requirements of the integrators. In addition, the front-end DAC of the proposed modulator is simplified. Simulation results verify the effectiveness of the proposed architecture.