Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA

—We present algorithms for implementing large-scale regular expression matching (REM) on FPGA. Based on the proposed algorithms, we develop tools that first transform regular expressions into corresponding non-deterministic finite automata (RE-NFA), then convert the RE-NFA into structural VHDL that utilize both logic slices and block memory (BRAM) available on modern FPGA devices. An n-state m-character input regular expression matching engine (REME) can be constructed in O (n × m log2 m) time using O (n × m) memory space, resulting in a circuit that occupies no more than O (n × m) slices on FPGA. A large number of REMEs are placed automatically onto a twodimensional staged pipeline, allowing scalability to hundreds of REMEs with linear area increase, running at over 300 MHz on Xilinx Virtex 4 devices.

• Type: Conference
• Year: 2008
• Where: RECONFIG
• Authors: Yi-Hua E. Yang, Viktor K. Prasanna
• Keywords: Large-scale Regular Expression, Modern Fpga Devices, RECONFIG 2008, Reconfigurable Computing, Regular Expression