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RTAS
2008
IEEE

Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions

14 years 7 months ago
Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability analysis provides a firm basis to ensure that tasks meet their deadlines for which knowledge of worst-case execution time (WCET) bounds is a critical piece of information. Static timing analysis techniques are used to derive these WCET bounds. A limiting factor for designing realtime systems is the class of processors that can be used. Typically, modern, complex processor pipelines cannot be used in real-time systems design. Contemporary processors with their advanced architectural features, such as out-of-order execution, branch prediction, speculation, prefetching, etc., cannot be statically analyzed to obtain tight WCET bounds for tasks. This is caused by the non-determinism of these features, which surfaces in full only at runtime. In this paper, we introduce a new paradigm to perform timing analysis of...
Sibin Mohan, Frank Mueller
Added 01 Jun 2010
Updated 01 Jun 2010
Type Conference
Year 2008
Where RTAS
Authors Sibin Mohan, Frank Mueller
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