Understanding Tradeoffs in Software Transactional Memory

There has been a flurry of recent work on the design of high performance software and hybrid hardware/software transactional memories (STMs and HyTMs). This paper reexamines the design decisions behind several of these stateof-the-art algorithms, adopting some ideas, rejecting others, all in an attempt to make STMs faster. We created the transactional locking (TL) framework of STM algorithms and used it to conduct a range of comparisons of the performance of non-blocking, lock-based, and Hybrid STM algorithms versus fine-grained hand-crafted ones. We were able to make several illuminating observations regarding lock acquisition order, the interaction of STMs with memory management schemes, and the role of overheads and abort rates in STM performance.

• Type: Conference
• Year: 2007
• Where: CGO
• Authors: David Dice, Nir Shavit
• Keywords: CGO 2007, Hardware/software Transactional Memories, Hybrid STM, Software Engineering, STM Algorithms