Production Yield and Self-Configuration in the Future Massively Defective Nanochips

We address two problems in this work, namely, 1) the resilience challenge in the future chips made up of massively defective nanoelements and organized in replicative multicore architectures and 2) the issue of preserving the production yield. Our main suggestion is that the chip should be self-configuring at the architectural level, enabling with almost no external control mechanisms, core mutual-test to isolate the defective core and self-configuration of communications to discover the routes in the defective network. Our contribution is a systematic study of the dependence of the production yield versus the core failure probability (possibly as high as 0.4) in several networks with different node connectivity ranging from 3 to 5. The result is obtained in terms of a probabilistic metrics to warrant that a minimal fraction of nodes can be contacted by the input-output port for participating to the processing.

• Type: Conference
• Year: 2007
• Where: DFT
• Authors: Piotr Zajac, Jacques Henri Collet
• Keywords: Defective Core, DFT 2007, Hardware, Production Yield, Replicative Multicore Architectures