Mean Time to Lose Lock for a PLL with Loop Delay under Thermal and Phase Noise Conditions

—The growing demand for reliable communications leads to the need for very large mean time to lose lock (MTLL) of PLL based synchronization subsystems. These large MTLLs, of the order of months, cannot be simulated or tested in a lab. In this work a systematic approach is given to computing the MTLL of a second order PLL with parasitic delay at low SNR and high phase noise. Computed and simulated results are shown to be in good agreement for values that can be simulated. Keywords-loop delay; mean time to lose lock; Pade approximation; PLL; phase noise.

• Type: Conference
• Year: 2007
• Where: ICC
• Authors: Uri Yehuday, Ben-Zion Bobrovsky, Jeffrey Davidson
• Keywords: Communications, ICC 2007, Mean Time, Phase Noise, PLL Based Synchronization