— This paper demonstrates that the algorithmic performance of end user programs may be greatly affected by the two or three level caching scheme of the processor, and we introduce a general but simple model that estimates this effect with good accuracy. Using 4 different processors and two simple tests, we demonstrate that a number of random reads and writes in an array can have a penalty factor of 40-70 compared to the exact same number of sequential array accesses. These effects from cache misses first occur when a randomly accessed array is larger than the L1 cache and even more so when the array does not fit in the much larger L2 cache. A similar but much smaller effect between sequential reads and writes in large arrays compared with smaller arrays is also reported. In the second part of this paper three versions of the well known Radix algorithm is used to demonstrate that the ‘artificial’ results from the first part definitely occur in practice. These versions use one, two...