PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator

In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 processor core at a configurable level of detail ranging from RTL-level models of all key pipeline structures, caches and devices up to full-speed native execution on the host CPU. Unlike other microarchitectural simulators, PTLsim targets the real commercially available x86 ISA, rather than a discontinued architecture with limited tools and an uncertain future. PTLsim supports several flavors: a single threaded userspace version and a full system version providing an SMT model and the infrastructure for multi-core support. We first describe what it takes to perform cycle accurate modeling of a complete x86 machine at the uop (micro-operation) level, along with the challenges and requirements for effective full system multi-processor capable simulation. We then describe the internal architecture of full system P...

• Type: Conference
• Year: 2007
• Where: ISPASS
• Authors: Matt T. Yourst
• Keywords: Full-speed Native Execution, ISPASS 2007, Software Engineering, Threaded Userspace Version, X86-64 Processor Core