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SIPS
2007
IEEE

Montgomery Modular Multiplication Algorithm on Multi-Core Systems

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Montgomery Modular Multiplication Algorithm on Multi-Core Systems
In this paper, we investigate the efficient software implementations of the Montgomery modular multiplication algorithm on a multi-core system. A HW/SW co-design technique is used to find the efficient system architecture and the instruction scheduling method. We first implement the Montgomery modular multiplication on a multi-core system with general purpose cores. We then speed up it by adopting the Multiply-Accumulate (MAC) operation in each core. As a result, the performance
Junfeng Fan, Kazuo Sakiyama, Ingrid Verbauwhede
Added 04 Jun 2010
Updated 04 Jun 2010
Type Conference
Year 2007
Where SIPS
Authors Junfeng Fan, Kazuo Sakiyama, Ingrid Verbauwhede
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