Designing Heterogeneous FPGAs with Multiple SBs

Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose, we develop a new methodology consisting of two steps: (i) Exploration and determination of the optimal wire length and (ii) Exploration and determination of the optimal combination of multiple switchboxes, considering the optimal choice of the former step. The proposed methodology for designing the high performance interconnection architecture is fully-supported by the software tool called EX-VPR. For both steps, the selection criterion for a minimal Energy×Delay Product is chosen. Depending on the localized performance and energy consumption requirements of each specific region of FPGA architecture, we derive a set of corresponding spatial routing information of the applications mapped onto FPGA. We achieved Energy×Delay Product reduction by 120%, performance increase by 110%, reduction in total energy co...

• Type: Conference
• Year: 2007
• Where: ARC
• Authors: Kostas Siozios, Stelios Mamagkakis, Dimitrios Soudris, Antonios Thanailakis
• Keywords: ARC 2007, Energy Consumption, FPGA Routing Architecture, Hardware, Optimal Wire Length