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HIPEAC
2007
Springer

Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems

14 years 5 months ago
Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems
Voltage scaling reduces leakage power for cache lines unlikely to be referenced soon. Partitioning reduces dynamic power via smaller, specialized structures. We combine approaches, adding a voltage scaling design providing finer control of power budgets. This delivers good performance and low power, consuming 34% of the power of previous designs.
Major Bhadauria, Sally A. McKee, Karan Singh, Gary
Added 07 Jun 2010
Updated 07 Jun 2010
Type Conference
Year 2007
Where HIPEAC
Authors Major Bhadauria, Sally A. McKee, Karan Singh, Gary S. Tyson
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