In this work we consider coefficient reordering for low power realization of FIR filters on fixed-point multiply-accumulate (MAC) based architectures, such as DSP processors. Compared to previous work we consider the input data correlation in the ordering optimization. For this we model the input data using the dual bit type approach. Results show that compared with just optimizing the number of switches between coefficients, the proposed method works better when the input data is correlated, which can be assumed for most applications. Key words: FIR filter, MAC, dual bit type, switching activity, coefficient reordering