Sciweavers

DAC
2004
ACM
16 years 7 months ago
ORACLE: optimization with recourse of analog circuits including layout extraction
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd
DAC
2004
ACM
16 years 7 months ago
An analytical approach for dynamic range estimation
It has been widely recognized that the dynamic range information of an application can be exploited to reduce the datapath bitwidth of either processors or ASICs, and therefore th...
Bin Wu, Jianwen Zhu, Farid N. Najm
DAC
2004
ACM
16 years 7 months ago
On path-based learning and its applications in delay test and diagnosis
Li-C. Wang, T. M. Mak, Kwang-Ting Cheng, Magdy S. ...
DAC
2004
ACM
16 years 7 months ago
Refining the SAT decision ordering for bounded model checking
Bounded Model Checking (BMC) relies on solving a sequence of highly correlated Boolean satisfiability (SAT) problems, each of which corresponds to the existence of counter-example...
Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio So...
DAC
2004
ACM
16 years 7 months ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
DAC
2004
ACM
16 years 7 months ago
Efficient timing closure without timing driven placement and routing
Miodrag Vujkovic, David Wadkins, William Swartz, C...
DAC
2004
ACM
16 years 7 months ago
First-order incremental block-based statistical timing analysis
Chandramouli Visweswariah, K. Ravindran, K. Kalafa...
DAC
2004
ACM
16 years 7 months ago
Automatic generation of breakpoint hardware for silicon debug
Scan-based silicon debug is a technique that can be used to help find design errors in prototype silicon more quickly. One part of this technique involves the inclusion of breakpo...
Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep...
DAC
2004
ACM
16 years 7 months ago
Efficient on-line testing of FPGAs with provable diagnosabilities
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
Vinay Verma, Shantanu Dutt, Vishal Suthar