1-V 7-mW dual-band fast-locked frequency synthesizer

This paper presents a fully integrated 1-V, dual band, fastlocked frequency synthesizer for IEEE 802.11 a/b/g WLAN applications. It can synthesize frequencies in the range of 2.4 - 2.7 GHz with a step of 9.375 MHz, and in the range of 5.14 - 5.70 GHz with a step of 20 MHz. Simulation using 0.18µm rf and mixed-signal CMOS technology demonstrates a total power consumption of 7-mW. An adaptive bandwidth controller is employed to achieve a fast locking time. The frequency divider combines the conventional and the extended true-single-phase-clock logics. To ensure a proper dividing function, a cascode voltage switch (CVS) topology is used in the preamplifier stage. The reference spurs at an offset of 10-MHz are as low as -80 dBc, and the phase noise at an offset of 1 MHz is lower than -118 dBc for the entire tuning range. Categories and Subject Descriptors B.7.m [INTEGRATED CIRCUITS]: Miscellaneous-Radio Frequency Integrated Circuits General Terms Design, Performance Keywords Frequency...

• Type: Conference
• Year: 2005
• Where: GLVLSI
• Authors: Vikas Sharma, Chien-Liang Chen, Chung-Ping Chen
• Keywords: Frequency Integrated Circuits, Frequency Synthesizer, GLVLSI 2005, Phase Noise, VLSI