Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

26

DATE
2010
IEEE

favoriteEmaildiscussreport

198views Hardware» more DATE 2010»

A 14 bit, 280 kS/s cyclic ADC with 100 dB SFDR

14 years 5 months ago

A 14 bit, 280 kS/s cyclic ADC with 100 dB SFDR

Download www.date-conference.com

— This paper presents the design of a 14 bit, 280 kS/s

Thomas Froehlich, Vivek Sharma, Markus Bingesser

Real-time Traffic

DATE 2010 | Hardware | Paper | Presents |

claim paper

Post Info
More Details (n/a)

Added	10 Jul 2010
Updated	10 Jul 2010
Type	Conference
Year	2010
Where	DATE
Authors	Thomas Froehlich, Vivek Sharma, Markus Bingesser

Comments (0)