Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive computations to the memory system. An Active Page consists of a page of data and a set of associated functions which can operate upon that data. We describe an implementationof Active Pages on RADram (Recon gurable Architecture DRAM), a memory system based upon the integration of DRAM and recon gurable logic. Results from the SimpleScalar simulator BA97] demonstrate up to 1000X speedups on several applications using the RADram system versus conventional memory systems. We also explore the sensitivity of our results to implementations in other memory technologies.
Mark Oskin, Frederic T. Chong, Timothy Sherwood