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32

FPGA
2008
ACM

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The amorphous FPGA architecture

14 years 15 days ago

The amorphous FPGA architecture

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This paper describes the Amorphous FPGA, an innovative architecture attempting to optimally allocate logic and routing resource on per-mapping basis. Designed for high performance, routability, and ease-of-use, it supports variablegranularity logic blocks, dedicated wide multiplexers, and variable-length bypassing interconnects with a symmetrical structure. Due to its many unconventional architectural features, the amorphous FPGA requires several major modifications to be made in the standard VPR placement/routing CAD flow, which include a new placement algorithm and a modified delay-based routing procedure. It is shown that, on average, an FPGA with the amorphous architecture can

Mingjie Lin

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Amorphous Fpga | FPGA | FPGA 2008 | Variable-length Bypassing Interconnects | Variablegranularity Logic Blocks |

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Added	26 Oct 2010
Updated	26 Oct 2010
Type	Conference
Year	2008
Where	FPGA
Authors	Mingjie Lin

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