The amorphous FPGA architecture

This paper describes the Amorphous FPGA, an innovative architecture attempting to optimally allocate logic and routing resource on per-mapping basis. Designed for high performance, routability, and ease-of-use, it supports variablegranularity logic blocks, dedicated wide multiplexers, and variable-length bypassing interconnects with a symmetrical structure. Due to its many unconventional architectural features, the amorphous FPGA requires several major modifications to be made in the standard VPR placement/routing CAD flow, which include a new placement algorithm and a modified delay-based routing procedure. It is shown that, on average, an FPGA with the amorphous architecture can

• Type: Conference
• Year: 2008
• Where: FPGA
• Authors: Mingjie Lin
• Keywords: Amorphous Fpga, FPGA, FPGA 2008, Variable-length Bypassing Interconnects, Variablegranularity Logic Blocks