Application-Specific Memory Interleaving for FPGA-Based Grid Computations: A General Design Technique

Many compute-intensive applications generate single result values by accessing clusters of nearby points in grids of one, two, or more dimensions. Often, the performance of FGPA implementations of such algorithms would benefit from concurrent, non-interfering access to all points in each cluster. When clusters contain dozens of points and access patterns are irregular, multiported memories are infeasible and vector-oriented approaches are inapplicable. Instead, the grid points may be distributed across multiple interleaved memory banks so that, when accessing any cluster, each point comes from a different memory bank. We present a general technique based on the application's multidimensional indexing rather than linearized memory addresses. This technique maps the cluster structure into a custom, interleaved memory using the FPGA's multiple onchip RAMs and configurable data paths. Case studies demonstrate rectangular and non-rectangular grids of different dimensions, includi...

• Type: Conference
• Year: 2006
• Where: FPL
• Authors: Tom Van Court, Martin C. Herbordt
• Keywords: FPL 2006, Hardware, Interleaved Memory, Memory Bank, Multiple Interleaved Memory